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February 23, 2020, 22:59 |
Epyc 7302 Scalability
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#1 |
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Hello everyone,
I'm currently sourcing for parts to build a workstation/server for OpenFoam for research. I was wondering about the scalability of the Epyc 7302. OpenFOAM benchmarks on various hardware I found this post which was pretty much what I was looking for. However I've been wondering whether if I only had a single Epyc 7302 processor with DDR4-3200 ECC 8 X 4GB, would it be reasonable to expect more or less the same results at 16 cores as in the link above? I also found from this study that it would be better to have a cluster whereby the ratio of the cores to the memory channels are constant. Page 3 - 4 shows some test results comparing two different processors & configurations. https://www.simutechgroup.com/images...tions-2018.pdf If I were to add an additional 7302 to the mix over time, I'm just unsure if there will be a bottleneck in terms of the limited memory channels & bandwidth? Or does the additional processor provide the extra 8 memory channels and bandwidth? |
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February 24, 2020, 00:17 |
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#2 | ||
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Alex
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Quote:
A better estimate will be half the performance of this system when it it utilizing all 32 cores. Quote:
Adding a second CPU later (with another 8 DIMMs) will get you to the same level of performance in that benchmark you quoted. Minus a few percent penalty from using 4GB DIMMs, which will be single-rank. The other system used dual-rank DIMMs. |
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February 24, 2020, 00:23 |
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#3 | |
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Quote:
Performance(t) = 26.89 seconds (Based on 32 core performance) * 2 = 53.78s Is this correct? |
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February 24, 2020, 00:27 |
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#4 | |
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Quote:
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February 24, 2020, 00:31 |
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#5 |
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Alex
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Yes, having both CPUs in one shared memory system only has advantages, I can't think of any downsides.
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February 24, 2020, 02:20 |
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#6 |
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February 24, 2020, 08:07 |
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#7 |
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So AMD have launched the EYPC 7532 - 32 cores, but with the full 256MB of L3 cache.
They are apparently touting performance in CFX. I'm dubious that they have sized the problem to the cache. Would extra L3 really show significant speedup for a real problem that sits mostly in system memory? |
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February 24, 2020, 08:16 |
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#8 |
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Alex
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Depending on where your threshold lies, the advantage will not be significant. But it is there. In addition to that, this CPU has one of the highest TDP among the regular 32-core Epyc Rome CPUs. A little higher frequencies would have been nice to have though.
It will most likely be the most expensive 32-core CPU in the linup, but when you pay regular prices for CFX licenses, the CPU pays for itself within a few months tops. |
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February 24, 2020, 09:01 |
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#9 |
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Would a 32c CPU be worthwhile with 8ch memory?
24cores = 3 x 8 Certainly a trade off to consider there - extra 8 threads of license & added CPU cost. I suppose, leaving licenses fixed at 32 threads - breaking out to a second socket and balancing 16 on each would be the better solution. Might even be cheaper too. |
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February 24, 2020, 12:34 |
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#10 |
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Alex
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You definitely have a point. Two 16-core CPUs would be much faster than a single 32-core CPU.
Last time I checked, Ansys licensing scheme increases core counts by a factor of 4. So you can run a single simulation with 8 threads with a basic license, adding 1 HPC pack gets you to 32 threads, adding another yields 128 threads. So there might not even be a market for dual-socket Ansys workstations with 2x32 cores. But then again, we are dealing with marketing here... |
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February 25, 2020, 00:32 |
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#11 |
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Why would two 16-core CPUs be much faster than a single 32-core CPU though?
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February 25, 2020, 04:06 |
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#12 |
Super Moderator
Alex
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Shared resource contention.
CPU cores have their own resources, which they can use exclusively. Like their FP units, L2 cache etc. But they also have to compete for shared resources, that all CPU cores have access to. For example L3 cache, TDP and thermal budget, and memory controllers. With 2 CPUs, you double the amount of shared resources for the most part. L3 cache is an outlier here, because we are comparing two 16-core CPUs with 128MB L3 against one 32-core CPU with 256MB L3. The main advantage is having twice the amount of memory controllers/channels. So when all cores are hard at work, each one gets a larger share of these shared resources, leading to higher performance overall. |
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epyc rome |
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